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 CXA2596M
RF Amplifier for CD Players
Description The CXA2596M is an IC developed for compact disc players. This IC incorporates an RF amplifier, focus error amplifier, tracking error amplifier, APC circuit and RF level control circuit. (The voltageconverted optical pickup output is supported.) Features * Low power consumption (50 mW at 2.5 V) * High-band RF amplifier * APC circuit * RF level control circuit (Hold circuit included) * Both single power supply and dual power supply operations possible. * Compatible with pickup for LC and PD Applications Compact disc players Structure Bipolar silicon monolithic IC 24 pin SOP (Plastic)
Absolute Maximum Ratings (Ta=25 C) * Supply voltage VCC 12 V * Operating temperature Topr -20 to +75 C * Storage temperature Tstg -65 to +150 C * Allowable power dissipation 650 mW PD Operating Conditions Supply voltage VCC--VEE 4.5 to 5.5
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E99749-TE
CXA2596M
Block Diagram and Pin Configuration
APC PD AMP
1k
VCC
HOLD
1
VCC
10k 55k
56k 10k
24 VCC
VEE
AGCVTH
2
10k
23 LC/PD 56k
APC LD AMP
VEE
VREF 1.25V
LD
3
10k
22 LD_ON
13.4k
50A
VCC
VC
PD
4
21 HOLD_SW
670mV 24k A 100k 20 AGCCONT 15k 15k
(60%/40%/OFF)
5
23.3k 24k
100k
B
6
44.1k
23.3k 24k 20k
VC
19 RF_BOT
C
7
VC VC
23.3k 24k
VEE 18 RFTC
25.4k
D
8
23.3k 14k 5k
RF SUMMING AMP
17
RF_I
5.7k
RF_EQ_AMP
VC
VEE
VEE
9
VC
260k
26k
FOCUS ERROR AMP
16
RFO
25p
87k
13k
VC 820k 820k 15 RFE 87k 25p 23.8k VC 26k 30k VCC VEE 23.8k 13 TE
TRACKING ERROR AMP
F 10
12p
E 11
12p 158.45k
14 FE
VC
VC 12
VC BUFFER
13k
260k
158.45k
R34 147 VC 15k R26
30k
VC
--2--
CXA2596M
Pin Description Pin No. Symbol IO Equivalent circuit Description
1
1
HOLD
--
147 500 VEE
External hold timeconstant pin for RF level control.
50 147
2
AGCVTH
--
2
13.4k 10
Variable pin of reference level for RF level control. The reference level can be varied by the external resistor.
VCC VCC 10k 1k 55.7k
3
LD
O
3
Output pin of APC amplifier.
VEE
VCC 17
4
PD
I
4
55k 147 10k
Input pin of APC amplifier.
VEE VEE
VEE VEE
--3--
CXA2596M
Pin No.
Symbol
IO
Equivalent circuit
VCC 24k 23.2k 25p VCC VCC VCC
Description
A5
5 6 7 8
A B C D
I I I I
B6
24k 23.2k
14k
174k
4.2k C7 24k 23.2k 100 8 174k 25p
Input pin of RF and FE amplifiers for Pins 5, 6, 7 and 8.
D8
24k 23.2k
VEE
VC
VEE
VC
9
VEE
--
VCC VCC VCC VCC VCC VCC VCC VCC
VEE.
12p
12p
10 11 23
F E LC/PD
I I I
147 10 820k 23 820k 147 11
403k
403k
96.3k 8 VEE VC
96.3k 8 VEE VC
Input pin of tracking error amplifier for Pins 10 and 11. An external resistor for V-I conversion should be connected because these pins are for current input. Pin 23 is a bias for LC when connected to VCC and for PD IC when left open.
VCC
VCC 200
120
12
VC
O
147 12 120
15k
16k
DC voltage output pin of (VCC+VEE)/2. Connect to GND when dual power supply (2.5 V) is used; connect a smoothing capacitor when single power supply (+5 V) is used.
VEE
--4--
CXA2596M
Pin No.
Symbol
IO
Equivalent circuit
VCC
Description
13
TE
O
147 13
158.45k
Output pin of tracking error amplifier. The F-E signal is output.
10p 400 VEE
VCC
VEE
25p
14
FE
O
14
147
87k
Output pin of focus error amplifier.
10p 400 VEE VEE
25.4k 5.7k
25
15
RFE
--
15 5k
Equalizing pin of RF amplifier. Frequency response can be adjusted by connecting CR to this pin.
VCC
147
25.4k
16
RFO
O
16 60k 800
Output pin of RF amplifier.
147 17
17
RF_I
I
15k
Input pin of RF amplifier output RFO with capacitance coupled.
20
--5--
CXA2596M
Pin No.
Symbol
IO
Equivalent circuit
Description
18
RFTC
--
147 18 50
50
External time-constant pin for RF level control.
10
19
RF_BOT
--
147 19 50
50
External bottom timeconstant pin for RF level control.
20
15
15
20
AGCCONT
I
147 20 50k 7
RF level control ON (limit level of 60 % / 40 %)/ OFF switching pin. 60 % for VCC, 40 % for open or VC and OFF for VEE.
147
21
HOLD_SW
I
21
RF level control hold ON/OFF switching pin. ON for VCC and OFF for VEE.
VCC 50 147
22
LD ON
I
22 VREF
ON/OFF switching pin of APC amplifier. ON for VCC and OFF for VEE.
30k
VEE VEE
VEE
VEE
24
VCC
-- --6--
VCC
Electrical Characteristics
SW conditions and measurement method Input GND 6.5 -13.5 -10 Output DC measurement -25 Output AC measurement Output DC measurement Output DC measurement Input GND 0 10 Input GND Input GND 13.5 -6.5 25 mA mA mV dB 2.2 -- -- -- 0 -- -2 30.0 14.3 17.3 20.3 V V mV dB Min. Typ. Max. Unit Bias conditions Description of I/O waveform
2.5 V power supply (VCC=2.5 V, VEE=-2.5 V, VC=GND)
Measurement item 3 24 9 16 1 kHz 100 mVp-p O 280 mV -280 mV 14 1 kHz 200 mVp-p O 200 mVp-p 14 O O 13 O 140 mVp-p O 140 mVp-p 1 kHz 1 kHz 13 O 700 mV 14 Input GND 700 mV 14 V15-4=V15-2-V15-3 Output DC measurement Output DC measurement Output DC measurement Output AC measurement 13 13 O OO 2.0 V 2.0 V 2.0 V 0.5 V O 2.0 V 1.3 V 1.3 V 1.3 V 1.3 V 1.3 V 270 mV 230 A 410 A 590 A 0 A 0 A O 270 mV 13 13 3 3 3 3 3 LD OFF I2=0.8 mA V13-4=V13-2-V13-3 Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement Output DC measurement 1.9 -35 1 kHz 14 14 16 O 16 16 4 5 6 7 8 9 10 E1 E2 E3 E4 AC1 AC2 I1
Symbol
Measurement No.
1
2
Current consumption
ICC
IEE
3
Offset voltage 1
V16-1
4
Voltage gain
Measurement pin
1
2
V16-2
OOOO
19.9 22.9 25.9
6
RF amplifier
5
Maximum output amplitude H V16-3
OOOO
Maximum output amplitude L
V16-4
OOOO
7
Offset voltage
V14-1
Output DC measurement -30.0 Output AC measurement
8
Voltage gain 1
V14-2
O
O
FE amplifier
9
Voltage gain 2
V14-3
O
Output AC measurement
14.3 17.3 20.3 -3.0 0 -- -- 0 35 21.9 24.9 27.9 3.0 -1.9
dB dB V V mV dB
10
Voltage gain difference
V14-4
11
Maximum output amplitude L
V14-5
O
O
12
Maximum output amplitude H V14-6
O
TE amplifier
APC
--7--
13
Offset voltage 1
V13-1
14
Voltage gain 1
V13-2
15
Voltage gain 2
V13-3
Output AC measurement
21.9 24.9 27.9 -3.0 1.9 -- -- -1.5 0.6 2.1 -- 0 -- -- 3.0 -- -1.9 -1.7 -0.3 0 2.0 2.3 -- 1.1 -- -- 0
dB dB V V V V V V V
16
Voltage gain difference
V13-4
17
Maximum output amplitude H V13-5
18
Maximum output amplitude L
V13-6
19
Output voltage 1
V3-1
20
Output voltage 2
V3-2
21
Output voltage 3
V3-3
22
Output voltage 4
V3-4
23
Maximum output amplitude
V3-5
O in the SW conditions represents the ON state.
CXA2596M
SW conditions Bias conditions Description of I/O waveform and measurement method Level control : 60 % (E4 : 4 V) -Level control OFF (E4 : 0.5 V) Level control : 40 % (E4 : 2.5 V) -Level control OFF (E4 : 0.5 V) Level control : -60 % (E4 : 4 V) -Level control OFF (E4 : 0.5 V) Level control : -40 % (E4 : 2.5 V) -Level control OFF (E4 : 0.5 V) HOLD OFF ON (t=0 ms) 4 V/1 V 3.8 V/1.3 V 1 V (t=100 ms)-V (t=0 ms) HOLD OFF Level control 60 % 1V 1 3.8 V/1.3 V OFF (t=0 ms) (V (t=1 ms)-V (t=0 ms))/(steady value-V (t=0 ms)) HOLD OFF Level control OFF 1V 1 3.8 V/1.3 V 60 % (t=0 ms) (V (t=1 ms)-V (t=0 ms))/(steady value-V (t=0 ms)) 12 Output DC measurement -100 -- 100 mV 98 -- 100 % 98 -- 100 % Level control 60 % OFF (t=10 ms) -10 -2 0 mV Min. Typ. Max. Unit
Measurement item 3 E1 E2 E3 E4 AC1 AC2 I1 4 5 6 7 8 9 10
Symbol
24 O 50 mV 2.0 V 3.8 V/1.3 V 700 A
Measurement No.
60 % limit
V3-6
Measurement pin
1
2
OOOO
3
-2950-2350-1150 mV
25 O 100 kHz 1.6 Vp-p 100 kHz 1.6 Vp-p 170 A 3 170 A 3 50 mV 2.0 V 3.3 V/1.3 V 700 A
40 % limit
V3-7
OOOO
3
-1620-1120 -120 mV
26 O 2.0 V
-60 % limit
V3-8
3.8 V/1.3 V
1550 2350 2800 mV
27 O
-40 % limit
V3-9
2.0 V
1.8 V/1.3 V
598 1098 1598 mV
RF level control
28
Hold characteristics
V1-1
29
Response
characteristics 1
V1-2
30
Response
--8--
characteristics 2
V1-3
31
Center output voltage
V12-1
O in the SW conditions represents the ON state.
CXA2596M
CXA2596M
C1
GND VEE
C3
24
33 HOLD VCC
GND VCC VCC VEE GND I2 I1
A
1
0.33 S9
23
VCC
AGCVTH
LC/PD
2
0.8mA
S8
22
VEE
LD
LD_ON
3
E2
R1
21
VEE
PD
HOLD_SW
4
E3
300 S1
20
VEE
A
AGCCONT
5
E4
R1 1M C3 0.01
GND GND GND GND GND GND
S2
19
B
RF_BOT
6
S3
18
C
RF TC
R1 1M C3 0.01
7
S4
17
D
RF_I
8
S10
AC2
Electrical Characteristics Measurement Circuit
R3 10k
VEE GND
GND
16
VEE
RFO
A
C4 33 S5 R2 150k S6 R4 150k
9
10
15
F
RFE
S7
R8 10k R9
GND
11
14
E
FE
AC1
GND
E1 GND 12 13
GND
VC
TE
10k
--9--
CXA2596M
Description of Functions RF Amplifier Each signal current from the photodiodes A, B, C and D is I-V converted, and input to Pins 5, 6, 7 and 8. These signals are added by the RF summing amplifier and equalized by the RF equalizing amplifier and then output to Pin 16. When the RF signal is equalized, an equalizing circuit is added to Pin 15.
A I-V A B I-V B C I-V C D I-V D
5
24k RF SUMMING AMP 5.7k RF EQAMP 5k 25.4k 16 RFO RFOUT 15 RFE
6
24k
14k
7
24k 4.2k 4.3k
8
24k VC VC
GND
Focus Error Amplifier The operation of (B+D)-(A+C) is performed and the signal is output to Pin 14.
A I-V A B I-V B C I-V C D I-V D
5
23.3k
6
23.3k 25p 87k 23.3k 25p FOCUS ERROR AMP 87k 23.3k VC 14 FE FEOUT VCC
7
8
GND
--10--
CXA2596M
Tracking Error Amplifier Each signal current from the photodiodes E and F is I-V converted and input to Pins 10 and 11 via an input resistor which determines the gain. The signal is amplified by the gain amplifier, operated by the tracking error amplifier and then the (F-E) signal is output to Pin 13. Pin 23 can be used as a bias for LC when connected to VCC and as a bias for PD IC when left open.
260k VC F I-V 150k E I-V 150k 10 820k 820k 11 VC 12p 260k
26k VC 13k 23.8k 158.45k
23
LC/PD
13 23.8k 26k VC 13k VC 12p TRACKING ERROR AMP 158.45k
TE TEOUT
GND
--11--
CXA2596M
APC & Laser Power Control
VCC R1 22 C3 100 LD
3
R6 1k VCC R16 56k LD ON 22 MICRO COMPUTER
L1 10H R14 10k
PD C1 1 R3 100 R2 500 LD PD VEE
4
R7 55k
R5 10k VEE
HOLD_SW R15 10k R17 56k x1 Vhold HOLD 21
MICRO COMPUTER
GND
1
VEE 50A VCC AGCVTH R18 V2 13.4k R10 20k 16 R11 44.1k VEE 17 R6 15k R4 15k V1 19 RF_BOT R9 1M C4 0.1 VEE R19 1M R13 100k 670mV VREF 1.25V R20 12.5k 20 VL C6 10 VEE
2
RFO C2 0.01 RF_I
AGCCONT
MICRO COMPUTER
R12 100k 18 RFTC C5 1 VEE
--12--
CXA2596M
* APC When the laser diode is driven by a constant current, the optical power output has extremely large negative temperature characteristics. The APC circuit is used to maintain the optical power output at a constant level. The laser diode current is controlled according to the monitor photodiode output. APC is set to ON by connecting the LD ON pin to VCC ; OFF by connecting it to VEE. * Laser Power Control (LPC) The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. The RFO and RF_I levels are compared and the larger of the two is smoothed by the RFTC's external CR. This signal is then compared with the reference level. The laser power is controlled by attaching an offset to VL according to the results of comparison with the reference level. Set the reference level to 670 mV. (center voltage reference) When the reference level is changed, connect the external resistor to the AGCVTH pin (Pin 2). The reference level can be raised by connecting the resistor between Pin 2 and the center output voltage or between Pin 2 and VCC. The AGCCONT pin (Pin 20) is used to switch the level of the laser power control circuit ; OFF, ON (laser power limit of 40 %) and ON (laser power limit of 60 %). The HOLD_SW pin (Pin 21) is used to switch the hold ON and OFF for the VL signal. Set this pin to ON so as not to follow the fluctuation of the RF signal.
AGCCONT L (VEE) M (VC or OPEN) H (VCC)
LPC OFF ON ON
LPC limit -- 40 % 60 %
VL variable range Approximately 1.27 V Approximately 1.27 V350 mV Approximately 1.27 V570 mV
--13--
CXA2596M
The hold ON/OFF operation is approximately as follows. 1. HOLD : Operation for OFF (a) | VL-Vhold | 2VT
VL IC
(VT26 mV)
x1 21 HOLD C
Vhold
VEE
VEE
(typ.) Ic=500 A (VLVhold) (b) | VL-Vhold | <2VT
VL R
x1 21 HOLD C VEE
Vhold
(typ.) R=105 2. HOLD : Operation for ON
x1 21 HOLD C VEE VEE IB
Vhold
(typ.) Ib=6.5 nA
--14--
CXA2596M
Center Voltage Generation Circuit This circuit provides the center potential when this IC is used at single power supply. The maximum current is approximately 3 mA. The output impedance is approximately 147 . Connect this circuit to GND when used at dual power supply.
VCC
VCC
30k VC BUFFER VC 12 147 30k 15k VEE VEE
33/6.3V
VC 33/6.3V
Notes on Operation 1. Power supply The CXA2596M can be used either at dual power supply or single power supply. The table below shows the connection of power supply for each case. VCC +power supply Power supply VEE -power supply GND VC GND OPEN
Dual power supply Single power supply
2. Laser power control The RF level is stabilized by attaching an offset to the APC VL and controlling the laser power in sync with the RF level fluctuations. Therefore, use this circuit in the state where the focus servo is applied. The laser life is shortened by increasing the laser power when the less light is reflected from the disc. It is recommended that the typical laser power value is set lower to maintain the laser life. The laser power limit value depends on the external circuit. Select the laser power limit setting considering the external conditions. Take care of the laser maximum ratings when using the laser power control circuit.
--15--
CXA2596M
Application Circuit * For single power supply +5 V
MICRO COMPUTER MICRO COMPUTER MICRO COMPUTER +5V
GND GND
SSP
SSP
1MEG
1MEG
VCC
0.1
VC
33/6.3V
1
0.01 24 23 22 21 20 19 18 17 16 15 14 13
AGCCONT
LD_ON
RF TC
RFO
VCC
FE
HOLD_SW
AGCVTH
HOLD
(60%/40%/OFF)
RF_BOT
LC/PD
RF_I
VEE
RFE
PD
B
D
1
10
2
3
4
5
6
7
8
9
33/6.3V
10
F
11
12
100
10H
I_V
I_V
I_V
I_V
I_V
150k
I_V
150k
500
GND
1/6.3V
VC
C
A
B
D
100/6.3V
VC
22
LD
GND VCC
PD
F
GND
* For dual power supply +2.5 V
MICRO COMPUTER MICRO COMPUTER MICRO COMPUTER +2.5V
VEE VEE
SSP
SSP
E
1MEG
1MEG
GND
VCC
0.1
33/6.3V
1
0.01 24 23 22 21 20 19 18 17 16 15 14 13
AGCCONT
LD_ON
RF TC
RFO
VCC
FE
HOLD_SW
AGCVTH
HOLD
(60%/40%/OFF)
RF_BOT
LC/PD
RF_I
VEE
RFE
PD
B
D
1
10
2
3
4
5
6
7
8
9
33/6.3V
10
F
11
12
100
10H
I_V
I_V
I_V
I_V
I_V
150k
I_V
150k
500
GND
1/6.3V
GND
C
A
B
D
VEE
100/6.3V
GND
22
LD
GND VCC
PD
F
VEE
GND
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--16--
E
VC
LD
C
A
E
TE
SSP
VC
LD
C
A
E
TE
SSP
CXA2596M
Package Outline
Unit : mm
24PIN SOP (PLASTIC)
+ 0.4 15.0 - 0.1 24 13
+ 0.4 1.85 - 0.15 0.15
+ 0.3 5.3 - 0.1
7.9 0.4
+ 0.2 0.1 - 0.05
0.24
M
PACKAGE STRUCTURE
MOLDING COMPOUND SONY CODE EIAJ CODE JEDEC CODE SOP-24P-L01 SOP024-P-0300 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING 42/COPPER ALLOY 0.3g
--17--
0.5 0.2
1 0.45 0.1
12
6.9
+ 0.1 0.2 - 0.05
1.27


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